外媒：苹果三星是制造3D芯片的关键

元器件交易网讯 11月12日消息，据外媒EETimes报道，苹果与三星都在3D集成电路技术上发力。掌握该项技术将决定谁将赢得未来消费电子终端的霸主地位，以下为全文摘译：

半导体产业僵局将被3D芯片堆叠技术打破，该技术将创造新一代高性能低能耗的系统。

这可能被Globalfoundries用来压低竞争对手台积电代工的2.5D芯片价格—如果它制造得出来的话。也可能被三星用来蚕食苹果的智能手机和平板市场。还有可能被英伟达用来从AMD手中抢占GPU市场份额，并且在精神上击溃对方。

FPGA供应商会描述今年二月国际固态电路会议上将两个65nm串行器安在FPGA旁的产品，同样蜂窝基站中ADC和DAC也可以安装在FPGA旁。因此，这些成本相对较高，小批量产品的应用正在慢慢扩大。

像AMD和Nvidia这样的显卡芯片厂商很希望在他们的GPU旁的硅中层介质中安装3D内存，这样产品就能有更高的性能和更低的能耗。但仍没有足够的理由花费10倍的额外费用去制造它。

潜在客户称3D存储器公司还没有准备好提供高容量产品，也许要到明年才可以。他们还预计推出可支持的JEDECHBM接口图形处理器的版本。但同时，价格仍旧是个问题。

三星已经有了所有的业务——DRAM，闪存，处理器和工厂，现已批量销售4G内存堆栈一段时间了，因此它具有一定的3D IC生产能力。

上周的ARM开发者大会上，三星向与会者演示了3D内存的样品以及使用JedecWide IO接口的猎户座处理器。它与传统的独立SoC及存储器的智能手机相比能耗更低。但三星对其何时产品化不予置评。

“真” 3D堆栈在使用硅晶穿孔技术连接逻辑和内存的使用者如智能手机的SoC上仍旧存在一些问题 。比如没有人知道如何去冷却逻辑、如何使用EDA工具和技能展示TSV依旧是不成熟的。

当使用3D集成电路制造智能手机合算时，三星的工程师都会有一个好想法。鉴于三星在移动终端领域的销量已经领先于苹果，发展这项新的充满挑战的技术将会是三星带来的压力消失的时候。

同时，观战者中的资深工程师指出的一个点让每个人都感到惊讶。他拆解了苹果iPhone5S中的A7处理器，处理器采用非常非常简单的六层结构—其中两层为信号层及地面信号层，他说。存储器本质上是在简单的电路板的另一侧。

他的拆解表明，苹果已经发现了一个3D半导体的低成本路径。把大部分的智能放在SoC上，并使用一个简单的PC板作为“穷人版的3D半导体。”

也许下一代iPhone会将柔性电路或玻璃或有机插板插进SoC和内存之间。这是一个能让无晶圆厂公司与晶圆厂企业巨头如三星垂直竞争的创举。

所以大家非常关心几件事：苹果和三星将会在移动终端领域做出什么动作？还有台积电与Globalfoundries及美光与SK海力士2.5D芯片的定价是多少？

谁会先掌握3D芯片技术呢？

以下为原文：

SANJOSE, Calif. – The semiconductor industry is in a standoff over the next bigthing -- 3D chip stacks. Someone needs to blink before the technology will beviable for creating the next generation of high-performance, low-power systems.

Itmight be Globalfoundries undercutting rival TSMC on foundry prices for a 2.5Dprocess -- if it can deliver it. It might be Samsung trying to widen its edgeon Apple in smartphone and tablets. Or perhaps Nvidia will take a big hit onmargins (maybe even a loss) to grab a big chunk of GPU marketshare andmindshare from rival Advanced Micro Devices.

Thatwas the picture fromapanel discussionwherea member of the audience made a shocking disclosure the Apple A7 SoC in theiPhone 5s is "a poor man's 3D IC."

Xilinxtalked about how it is already shipping 2.5D stacks where die are laidside-by-side on a silicon interposer. So far it has discussed products usingmultiple FPGAs or an FPGA and serdes on a chip.

TheFPGA vendor will describe at theInternational Solid StateCircuits ConferenceinFebruary a product that puts two 65nm serdes next to an FPGA. It is also saidto be working on devices with an ADC and DAC next to an FPGA for use incellular base stations. So the applications for these relatively high-cost,low-volume products are slowly expanding.

Butso far the Xilinx products are consuming less than 200 wafers a month,according to estimates. So what's the path to high volumes of tens or hundredsof thousands of wafers per month? In a word, torturous.

Nextpages: Logic vs. memory fabs and Apple vs. Samsung.

TSMCclaims it's a one-stop shop for 2.5D stacks, and Globalfoundries is at somestage of bringing up its own service. Having one neck to choke for a complextechnology like 2.5D chips is great, but the foundries are charging a 10xpremium. Yikes!

Graphicschip vendors such as AMD and Nvidia would love to put a nice big 3D memorystack on a silicon interposer next to their honking GPUs. The resultingproducts would have significantly higher performance and lower power, but notenough to justify the 10x manufacturing premium the foundries are charging.

Sothe industry is at a chicken-and-egg stand still for high volume 2.5D products.

Micronhopes its Hybrid Memory Cube could be the break out product. But it's not clearits high-end customers are the right vehicle. Fujitsu said it will show aprototype board at next week's supercomputer conference using (it is believed)as many as eight of the HMC stacks.[!--empirenews.page--]

Sothe technology is real and has users, but not high-volume ones -- yet. SK Hynixwill show its own version of a memory stack that like Micron's has four toeight DRAM die delivering something on the order of 160 Mbytes/second, so thereis competition.

Potentialcustomers say neither 3D memory company is ready to supply high volumes yet.Perhaps they will next year. They are also expected to roll versions thatsupport the Jedec HBM interface for graphics processors. The question, again,comes down to price.

Atthe panel session, Abe Yee, a packaging expert at Nvidia, had some suggestionsfor the likes of Globalfoundries, Micron, SK Hynix, and TSMC.

"We'veinvested $2 billion in [the chip stacking] market already and haven't got itback, but we continue to invest -- and our suppliers need to think the sameway," Yee said.

"Idon't think Moore's Law is going to last another 20 years, and even if it doeswe will still need to get memory closer to processors," Yee added."So this market is going to happen if you like it or not, and suppliers haveto think about how they will invest in it," he said.

Ofcourse it's always easier to tell the other guy to invest the next billion.Meanwhile, the other billion dollar question is, what will Samsung do?"

TheKorean giant has all the pieces -- DRAM, flash, processors, and fabs. It hasbeen selling as merchant products for some time 4 Gbyte memory stacks, so ithas some 3D capabilities.

AtARMTech Conlastweek, Samsung even teased attendees with a demo of a 3D stack of memory and itsExynos application processor using a Jedec Wide IO interface. It deliveredsignificantly lower power than a traditional separate smartphone SoC andmemory. But Samsung would not comment on if or when it would become a product.

Thereare a few problems with the "true" 3D stacks using through siliconvias to connect logic and memory for uses like smartphone SoCs. No one knowshow to cool the logic, for instance, and the EDA tools and skills to lay out theTSVs are said to be immature.

Inany case, Samsung's engineers likely have a good idea when it is economical tomake a 3D IC for smartphones. Given it is already pulling ahead of Apple inmobile device volumes, the pressure may be off for the moment to jump to a newand risky technology.

Meanwhile,a veteran engineer in the audience at the panel surprised everyone when hechimed in with a data point. He had done a teardown of the Apple A7 processorin the iPhone 5S. It uses a very, very simple six layer board -- twolayers each for signal, ground and signal, he said. The memory is essentiallyon the other side of the simple board.

Hisanalysis suggests Apple has discovered a low cost path to 3D ICs. Put most ofthe smarts in the SoC and use a simple pc board as "a poor man's 3DIC."

Perhapsthe next iPhone will use an even simpler layer between its SoC and memory chipsuch as a flex circuit or a glass or organic interposer. It's a great way for afabless company to compete with vertically integrated giant like Samsung.

Soeveryone is watching a few things very closely. What will Apple and Samsung doin mobile. And what will TSMC vs. Globalfoundries and Micron vs. SK Hynix do in2.5D pricing.

Whodo you think will blink first?